Method for detecting common typing errors

ABSTRACT

A method and apparatus for detecting typing errors of critical fixed series of characters (digits) by using at least one redundant parity digit. The invention detects the most common typing errors that involve both permutations and incorrect striking of adjacent characters during data entry via a keyboard of an electronic apparatus. The method provides warning to the data input operator when incorrect data entry occurs and optionally automatically suspends entry thereof.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention generally relates to verifying correct dataentry to an electronic apparatus, and particularly, to alerting anoperator of incorrect data entry.

[0003] 2. Description of the Related Art

[0004] Widespread use of electronic data processing devices such aspersonal computers, personal digital assistant devices and similarapparatus, with data entry devices such as keyboards, inevitablyinvolves more and more confidential personal data being entered, andsubsequently being transmitted with unknown consequences. In particular,such data is typically entered by an operator where incorrect entryfrequently occurs. Mis-entered data can have tragic consequences sincemisidentified personal confidential data (e.g., credit reports, priorcriminal records, etc.) are subsequently associated with that person.For example, a mis-entered U.S. social security number of a personduring some transaction can harm that person's reputation, prospectivejob opportunities or business concerns since it is a key identifier of aperson in the U.S. today.

[0005] Related prior art that deals with mis-entered data, e.g. FAXtelephone numbers, include U.S. Pat. No. 6,101,245 that discloses a dialverifier for facsimile (FAX) transmissions, which attempts to minimizemis-dialed FAX numbers from occurring, by dialing pre-compiled controlkeys that are added to telephone numbers, which is hereby incorporatedby reference. The control keys are compared against computed controlkeys and transmission is allowed or denied according to a match betweenthe dialed and computed control keys. However, this method has limitingaspects since the number of control keys has to be a prime number, whichin the case of telephone digits requires the introduction of foraneoussymbols (i.e., symbols such as “#”, “$” or “*” etc.) for the number“10.” To use this method for a fixed series of characters, foraneoussymbols must be added to reach the required next prime number (e.g., forthe 16 hexadecimal numbers a foraneous symbol must be added to achievethe next prime number 17). Problems associated with this method includeinherent complexity and limited utility since modification of existingdata bases must be implemented when using these foraneous symbols ascontrol keys to encode a series of characters, e.g., a FAX number. Usein other applications, such as large databases that relate criticalnumbers such as a social security number or a credit card number cannotreadily be adapted to this patented method since it requires deviationfrom traditional methods of assigning only pure numbers for thesespecial number designators. With the improved methods of the presentinvention using an encoding algorithm based on integer rings, or onprime power fields of numbers as presented below, either there is noneed to use foraneous symbols, or the number of foraneous symbols may begreatly reduced.

[0006] In particular, the U.S. Pat. No. 6,101,245 applies a method tophone number integers using modulo 11 arithmetic to determine thecontrol key codes. Since 11 is a prime number, the vector of weights asused therein has only to satisfy the condition that all the digits aredifferent until they are repeated. In particular, adjacent digits haveto be different so as to detect permutations of adjacent digits. Also,since the integers modulo 11 constitute a field, there are no zerodivisors and any typing error in one digit is detected. Thus, thedetection capability of the patented method can detect many permutationerrors and any mistyped digit, but has the disadvantage of requiring aforaneous symbol. Telephone companies, credit card companies orgovernmental agencies may be reluctant to introduce foraneous symbols inthe management of large databases that traditionally involve onlynumbers.

[0007] The advantages of using the prime power number encoding algorithmof one of the preferred embodiments of the present invention compared tothe U.S. Pat. No. 6,101,245 can be illustrated by reviewing the examplegiven at column 11, lines 39-53 of the '245 patent that is applied tonumeric as well as case-sensitive letters totaling 62 in number ofsymbols. The next prime number larger than 62 is 67. This requires theaddition of 5 foraneous symbols that are used by this method. On theother hand, by using one of the preferred embodiments to be describednext, the next power of a prime is 64, which requires only two foraneoussymbols, thereby requiring fewer such symbols for an improved an moreefficient encoding method.

[0008] Mis-entered data often involves errors in numerical data typed ona data entry keyboard. Those erroneously entered numbers may be creditcard or social security numbers that are often linked to critical data.The most common typing errors when entering such numbers includetransposition of two adjacent numbers (for example, 25 is typed as 52);and a number is typed in error as one of two possible adjacent numbers(e.g., 4 or 2 are typed instead of 3). If such common errors are notinstantly detected, a lot of time may be wasted trying to correct themlater and sometimes the error may have tragic consequences. Forinstance, when entering a social security number, if the operator makesa typing error and assigns a number corresponding to another user whenhandling a request, correcting the situation at a later time is both awaste of time and resources and may not be possible due to consequencesbeyond one's control after critical information has been transmitted.

[0009] Therefore, there is a need in data entry arts typicallyassociated with keyboard data entry so that most common typing errorsare immediately detected for appropriate correction during data entry.

SUMMARY OF THE INVENTION

[0010] It is, therefore, an object of the present invention to provide amethod and systems for use of this method giving mechanisms fordetecting at least the two common typing errors described above byadding one or more redundant parity characters (digits).

[0011] The method of the invention uses at least one redundant paritydigit, and performs arithmetic modulo an integer in order to obtain saidredundant parity digits without adding foraneous symbols. In a secondembodiment of the invention the number of foraneous symbols is minimizedby using an encoding algorithm based on finite field arithmetic over afield whose number of elements is a prime power. Both embodiments verifythe correctness of the redundant symbols and in case of a mismatch amechanism is used for warning of errors. Another embodiment has morepowerful error detection capabilities, but can use foraneous symbolsthat are limited in number.

[0012] Specifically, the preferred method of using the invention is fordetection of a permutation of adjacent characters (digits) or mis-typingof adjacent characters (digits) on the keyboard. The method can beextended to other typographical characters as well and limited only tonumbers. With the pervasiveness of e-commerce, where important shortvectors of crucial information need to be constantly typed, the methodhas numerous applications. The invention enhances error detection byadding an arbitrary number of parity characters (digits), wherein mosterrors can be detected. Moreover, the invention can be applied tosituations where numbers are entered using a keypad instead of akeyboard where frequent critical numbers are entered.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The foregoing and other objects, aspects and advantages will bebetter understood from the following detailed description of preferredembodiments of the invention with reference to the drawings, in which:

[0014]FIG. 1 shows a flow diagram illustrating the method of theinvention;

[0015]FIG. 2 shows a generalized form of the apparatus of the invention;and

[0016]FIG. 3 shows a data storage disk for storing the method of theinvention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION

[0017] A permutation of two adjacent characters (digits) designated assuch on an input keyboard of an electronic apparatus (e.g., a personalcomputer) is a particular case of what in coding theory is known as aburst error of length 2. According to the Reiger bound, in order todetect all possible bursts of length 2, at least two redundant paritycharacters (digits) must be added to a series of characters (digits).Even in view of such restrictions, how to effectuate this using the setof decimal digits as configured on a computer keyboard is not obvious,since these characters do not constitute a field. Although codes (rules)over symbols constituting a field are well known (the cardinality of afinite field must be a power of a prime number, wherein the number 10 isnot), there are not many codes having optimal properties over sets thatare not fields. Using these principals, the invention herein includesmechanisms for detecting the most common typing errors using only oneadditional parity digit when considering fixed sets of digits(characters). Common typing errors that the method detects includepermutation (transposition) of numerical characters (digits); and errorsas to one of two possible adjacent numbers (characters) on a keyboardduring data entry. Examples being a series of characters (digits), suchas a social security or credit card number.

[0018] Encoding Algorithm Using Arithmetic Modulo M:

[0019] In one preferred embodiment, the invention provides an encodingalgorithm for a series of n-characters (generally digits) that appendsone or more parity characters from the entered data information in theform of a series of characters that excludes foraneous symbols in saidparity characters. We describe the encoding for M=10, i.e., for digitsfrom 0 to 9. The encoding of these series of characters of a fixedlength n is as follows.

[0020] Considering a vector of digits u=(u₀, u₁, . . . , u_(n−1),), themethod of the invention adds to u a parity digit r. In effect, considerthe 8-digit vector of weights x=(2,1,4,3,6,7,8,9). Notice that the onlyexcluded digits are 0 and 5 (more about this later). Let w be the vectorof weights w=(w₀, w₁, . . . , w_(n−1)) defined as follows:

[0021] 1. If n<8 then w is equal to the first n elements of x inreversed order.

[0022] 2. If n=8 or n>8, then form a vector of length n by repeating theelements of x and then reverse the obtained vector. For example, if n=5,then w (6,3,4,1,2). If n=12, then w=(3,4,1,2,9,8,7,6,3,4,1,2).

[0023] Then, given the vector of digits u=(u₀, u₁, . . . , u_(n−1))mentioned above, define the parity digit r as the inner product:

r=u.w=u ₀ .w ₀ *u ₁ .w ₁₊ . . . +u _(n−1) .w _(n−1) (mod 10)  (1)

[0024] The notation mod 10 means that r equals the residue of dividingthe sum above by 10. In the language of error-correcting codes, we areconstructing an error-correcting code of dimension n and length n+1 overthe ring of integers modulo 10, whose parity-check matrix is given by:

H=(w,9),  (2)

[0025] where w is the vector of weights defined above. This is anencoding procedure for one digit. At the decoding or check procedure, ifa typed number of length n+1, say, (u₀, u₁, . . . , u_(n−1), u_(n)) isobtained, one finds first the parity digit r by applying the encodingprocedure described above to (u₀, u₁, . . . , u_(n−1)) and then comparesr and u_(n). If they coincide, then the vector is accepted, otherwise,an error is declared and noted by appropriate action (e.g., halting dataentry, providing a visual or audible alarms to the operator).

[0026] Note that the vector of weights w alternates even and odd digits.Moreover, the difference between any two consecutive digits in theparity-check matrix H=(w, 9 ) is either 1, 3, 7 or 9. These 4 elementsare invertible in the ring of integers modulo 10. The weights cancertainly be ordered in any way we choose as long as the differencebetween consecutive digits in H is invertible. This property allows fordetection of a permutation between adjacent digits (including the paritydigit r). Also notice that the odd weights in H correspond to the digits1, 3, 7 and 9 (5 has been excluded). As stated above, these four digitsare invertible modulo 10. Thus, any error occurring in the locationscorresponding to these digits will be detected. Errors in the locationscorresponding to the even weights 2, 4, 5 and 8 will be detected most ofthe time, but not always, since all these numbers share the zero-divisor5. That means, an error of magnitude 5 modulo 10 can be undetected.Specifically, this means that if a 0 is typed as a 5 (and conversely),it will be undetected. The same is true for 1 and 6, 2 and 7, 3 and 8and 4 and 9. Notice that the digits in all these pairs are at maximumphysical distance both in the keyboard and in the keypad, so the risk oftyping one instead of the other is minimized. Also, we could haveincluded the digit 5 in our vector of weights, but 5 has 4zero-divisors, 2, 4, 6 and 8. Thus, errors of magnitude 2, 4, 6 or 8modulo 10 would be undetected. For instance, if a 0 has been written anda 2, a 4, a 6 or an 8 are typed by mistake, then such an error would beundetected. Although such errors still do not involve adjacent keys inthe keyboard, exclusion of the weight 5 is favored in a preferredembodiment of the invention.

[0027] Next the invention is illustrated for the case of n=5, thus,w=(6,3,4,1,2). Assume that the vector u=(5,6,7,7,0) is to be encoded.Thus, we have to perform the inner product u. w modulo 10, which givesu. w=5.6+6.3+7.4+7.1+0.2=83=3 (modulo 10), since the residue of dividing83 by 10 is 3. Thus, the encoded vector is (5,6,7,7,0,3). Next, assumethat we want to type this encoded vector. If we type it correctly, thenumber will be accepted. However, if we permute, say, the second and thethird digit, that is, we type (5,7,6,7,0,3), then we have to encode thefirst 5 digits first, which gives 5.6+7.3+6.4+7.1+0.2=82=2 (modulo 10).Since 2 g3, then an error is detected and the number is not accepted.The same occurs with any permutation of adjacent digits in the vector,all of these errors are detected.

[0028] Next, assume that the first digit of (5,6,7,7,0,3) is typed inerror and we type (4,7,6,7,0,3) instead. Then, since4.6+6.3+7.4+7.1+0.2=77=7 (modulo 10) and 7 g3, this error is detected.On the other hand, if the typed vector was (0,6,7,7,0,3), then0.6+6.3+7.4+7.1+0.2=53=3 (modulo 10), and this error is not detected.However, it is unlikely that 0 will be typed instead of 5, since thekeys corresponding to these two digits are far away in the keyboard.Similarly, in the third digit, if a 2 is typed instead of a 7, then thiserror will be undetected, and in the fifth digit, if a 5 is typedinstead of a 0 then the error will be undetected. Errors in the second,fourth or sixth location, on the other hand, are always detected.

[0029] The method was described for the ring of integers modulo 10, butcan also be extended to any ring of integers. If alphanumeric charactersare being used, numbers may be assigned to letters wherein forM-alphanumeric characters, by applying the concepts of the method of theinvention to a ring of integers modulo M. When M is a prime number, aspecial case occurs wherein use of a prime number incorporates absenceof zero-divisors that makes any single error in a digit detectable (asconsidered in U.S. Pat. No. 6,101,245) but without need for foraneoussymbols in the method.

[0030] Encoding Algorithm Using Arithmetic Modulo a Prime Power q:

[0031] In another preferred embodiment of the invention, the method ofthe invention can be used for detection of any symbol in error and anypermutation of symbols whenever the number of symbols is a power of aprime number, not merely a prime number. This reduces the requirednumber of foraneous symbols that need to be introduced in many cases,wherein detection of any single mistyped symbol can be so detected. Toeffectuate, let q be a prime power, and consider the finite field GF(q).Let a be a primitive element in GF(q), that is, the powers of a generatethe non-zero elements in GF(q). Assume that we want to encode a vectorof n symbols u=(u₀, u₁, . . . , u_(n−1)). Consider a parity-check matrixconsisting of the q−1 different powers of a written in a certain order.For instance, in a preferred embodiment, we may consider the followingparity-check matrix of size 1×(n+1):

H=( . . . 1 a a ² a ³ . . . a ^(q-2) 1 a a ² a ³ . . . a ^(q-2) −1)  (3)

[0032] In the equation above, the sequence 1 a a²a³ . . . a^(q-2) isrepeated until completing the n entries and truncated as necessary. If qis even, the order above is convenient. If q is odd, some changes in theorder of the powers of a may need to be made in order to maximize thedetection capability against permutations. The code above can detect anysymbol typed in error and any permutation between symbols that are up toq−1 symbols apart. In particular, it can detect any permutation betweenadjacent symbols.

[0033] As an example of the method, consider the hexadecimal numbers 0,1, 2, . . . , 9, A, B, C, D, E, F, which can be represented by theelements of the finite field GF(16). Therefore, no foraneous symbols arenecessary in this case. Then, any typing error involving permutation ofadjacent hexadecimal numbers will be detected (and many otherpermutations) as well as any typing error involving a single hexadecimalnumber. If using the method in U.S. Pat. No. 6,101,245, a first primenumber larger or equal than 16 must be established. Such a number is 17,so that '245 method requires the introduction of a foraneous symbol,which is not necessary by the invention herein with obvious advantagesas stated above.

[0034] A second example of the advantages of using a prime power numberas opposed to a prime number can be found in the example given in U.S.Pat. No. 6,101,245, column 11, lines 39 to 53: the method there isapplied to cover numeric as well as case-sensitive letters. The totalnumber of symbols is 62. The next prime number larger than 62 is 67.This requires the addition of 5 foraneous symbols. On the other hand, ifa prime power approach is used like the one described in the presentinvention, the next prime power larger than 62 is 64. This requires theintroduction of only 2 foraneous symbols. Alternatively, we can doarithmetic modulo 62 like we did modulo 10, and avoid foraneous symbolsaltogether. The price will be a slight reduction in the class of typingerrors that can be detected, but the most common ones will still bedetected.

[0035] Generalization to Multiple Parities:

[0036] Another advantage of the prime power method as described above isthat immediate generalization to multiple redundant symbols is provided.In effect, consider the systematic code given by the parity-check matrixwhose two rows are given by:

1 a a² a³ . . . a^(q-2) 1 a a² a³ . . . a^(q-2) −1 0

1 a² a⁴ a⁶ . . . a^(2(q-2)) 1 a² a ⁴ a⁶ . . . a²(q-2) 0 −1  (4)

[0037] The first row coincides with the first row of the matrix H givenby (3). However, a second row corresponding to a second parity symbol isnow added. The second row, except for the last two entries, correspondsto the second powers of the first row. This is very similar to theconstruction of doubly-extended Reed-Solomon codes, except thatrepetition of columns is allowed once all the powers of the primitiveelement a have been exhausted. This new code with two parity symbols candetect any pair of consecutive errors. Moreover, it can detect any pairof errors provided that they are within up to q−2 symbols from eachother. Further generalization involves taking a third row formed by thethird powers of the first row, a fourth row formed by the fourth powersof the first row, etc.

[0038] We can also generalize the construction using arithmetic modulo Mto multiple parities. In effect, for the purpose of illustration,consider M=10. By adding a second parity character to the constructionon integers modulo 10, the second row must satisfy the followingcondition: the determinant of any two consecutive columns in theparity-check matrix has to be an invertible element modulo 10 (i.e., 1,3, 7 or 9). This property allows for detection of any two consecutiveerrors, and for detection of most pairs of errors. As an example,consider the parity-check matrix given by:

. . . 1 2 9 8 7 6 3 4 1 2 9 0

. . . 1 3 2 1 1 1 2 3 1 3 0 9  (5)

[0039] The determinant of the 2×2 matrix formed by two consecutivecolumns in the parity-check matrix above is invertible. The first row ofthe parity-check matrix is the same as the one of the parity-checkmatrix for one digit given by (2). The second row of the parity-checkmatrix given by (5) corresponds to the vector of weights ( . . . 1 3 2 11 1 2 3 1 3). For example, assume that one desires to encode a 10digit-vector. The first vector of weights is (1 2 9 8 7 6 3 4 1 2) andthe second one is (1 3 2 1 1 1 2 3 1 3). Moreover, assume that onedesires to encode the 10 digit vector (0 3 0 7 1 9 9 4 5 3 ). Taking theinner product with the first vector of weights, one obtains:0.1+3.2+0.9+7.8+1.7+9.6+9.3+4.4+5.1+3.2 177=7(mod 10).

[0040] Taking the inner product with the second vector of weights, oneobtains 0.1+3.3+0.2+7.1+1.1+9.1+9.2+4.3+5.1+3.3=70=0 (mod 10). Thus, theencoded vector is the 12-digit vector (1 2 9 8 7 6 3 4 1 2 7 0). Nowevery pair of consecutive errors can be detected. In particular, anytyping error involving two consecutive digits can be detected. Ineffect, assume that when typing the 12-digit vector (1 2 9 8 7 6 3 4 1 27 0) obtained above, an error is made in the second digit and (1 7 9 8 76 3 4 1 2 7 0) is typed. By re-encoding the first 10 digits of thisvector, i.e., (1 7 9 8 7 6 3 4 1 2), one obtains (1 7 9 8 7 6 3 4 1 2 75). The first parity digit is 7, which is the same that would beobtained from the scheme with one parity digit initially described. So,as discussed above, errors of size 5 (in this case, a 2 becomes a 7) gosometimes undetected when only one parity digit is used. However, inthis case, the second parity digit is 5, which does not correspond tothe 0 in the typed vector, and the error has been detected.

[0041] By generalizing the method of the invention to any number ofparities, in the case of 2 parities, a parity-check matrix is selectedsuch that each pair of consecutive columns has an invertible determinantmodulo 10. One can add another row to the parity-check matrix (and thus,a third parity symbol) by requiring that any 3 consecutive columns havean invertible determinant. This process can be continued for any numberof rows in the parity-check matrix, such that the resultant code detectsa number of consecutive errors equal to the number of rows of theparity-check matrix. Although this generalization of the method of theinvention has been illustrated for integers modulo 10, the abovedescription is for illustration purposes only. One skilled in the artcan readily extend this concept to any integer ring.

[0042] Referring now to FIG. 1 and FIG. 2, the method and electronicapparatus 200 of the invention are shown in general form. The methodstarts at step 101, a predetermined set of n-characters (digits) areencoded using the encoding method of the invention that are subsequentlystored in memory at step 102. The apparatus in actual use at step 103includes data entry by an operator using the data entry device(keyboard) 225 wherein n-characters (digits) significance are entered(e.g., a social security number) that may correlate with thepredetermined encoded series of characters stored in the electronicapparatus 200. This entered n-character vector sequence is then encodedusing the encoding algorithm wherein at least one secondary paritycharacter(s) is re-computed. At steps 104, comparison of the storedparity character(s) with the secondary parity characters occurs. At step105, if these parity character(s) coincide, then the n-character vector(data entry) is correct and data is processed. Otherwise an error isdetected and data entry is suspended for appropriate correction.

[0043] Referring to FIG. 2, the invention in hardware form includes aninput data entry device 225 such as a keyboard, keypad or other kind ofdata entry device (e.g., a keypunch machine for entering data on datacards for use with an electronic apparatus). Use of the invention isconcerned with data entry, wherein typing into a keyboard often includespermutation (transposition) of numerical (character) digits. This formof error is readily detected as to one of two possible adjacent numbers(characters) on a keyboard during entry of a series of digits, e.g., asocial security number or associated digits in a credit card number.Other examples where this occurs is e-commerce where many importantshort vectors (strings of characters) of crucial information areconstantly typed. By using the invention theses errors are minimized aswell.

[0044] As mentioned above, actual encoded series of n-characters(digits) is determined prior to actual use by a data entry operator.These encoded series of numbers are stored in memory of the electronicapparatus 200. This stored encoded data can be applied universally byGovernmental agencies or private business concerns. For example, socialsecurity numbers in many databases are used to associate a person withcritical data (credit reports, criminal records, etc.), can be encoded.Hardware embodying the invention includes any electronic apparatus 200having a data entry device 225 that in exemplary form may be a standardkeyboard and/or a keypad data entry device 250. Voice recognition dataentry devices can also be part of the apparatus. If keypunch/cardsmachines are used as part of the data entry device, the electronicapparatus still detects typing errors when such data cards areincorrectly typed and processed. Generic forms of the apparatus 200 mayinclude, but are not limited to, a personal computer, a personal digitalassistant having a touch-pad, or telecommunication equipment withvarious forms of data entry device(s). The memory in the electronicapparatus may comprise any hardware form for storing data, such as anintegrated circuit memory, hard drive, optical disk drive, etc. The gatedevice can be hardware, firmware or software within the memory devicecoupled to a processor of the electronic apparatus, and be anapplication specific integrated circuit (ASIC) that cooperativelyoperates with a graphical unit interface display forming part of theapparatus. The encoder and comparator devices of the apparatus can beeither software or firmware. The electronic apparatus 200 can be aunitary device or take the physical form of disparate parts incorporatedin a larger local area network (LAN) where a data entry occurs at remotelocation(s). Moreover, using the foregoing specification, the method ofthe invention may be implemented via standard programming and/orengineering techniques. The resulting program(s) may be stored on disk,diskettes 300 as shown in FIG. 3, memory cards, ROM or any other memorydevice used in association with the electronic apparatus 200. Forexecution, the program(s) may be copied into the system memory (RAM)associated with the central processing unit of either a local or remoteelectronic apparatus that can be a single piece of hardware (e.g., apersonal computer, personal digital assistant, etc.), connected in alocal area network (LAN) or even form part of wide area network (WAN)wherein the Internet can be form part of the apparatus 200. Thoseskilled in the art of computer science will readily be able to combinethe software created as described with appropriate general purpose orspecial purpose computer hardware to create an electronic apparatusembodying the invention. While the invention has been described in termsof preferred embodiments, those skilled in the art will recognize thatthe invention can be practiced with modification within the spirit andscope of the appended claims.

What is claimed is:
 1. A method for verifying proper data entry into anelectronic apparatus using a data entry device, the method comprising:encoding and storing a predetermined series of n-characters from analphabet of size M using a modulo M arithmetic encoding algorithm notrequiring characters foraneous to said alphabet, whereby a resultantencoded series of characters adds at least one stored parity characterto said predetermined series of n-characters; entering an entered seriesof characters using said data entry device; recomputing secondary paritycharacter(s) from first n-characters of said entered series ofcharacters using said encoding algorithm; comparing said stored paritycharacter(s) with corresponding said secondary parity character(s); andpreventing data entry if said parity character(s) comparison of saidsecondary parity character(s) and said stored parity character(s) aredifferent.
 2. The method in claim 1, wherein said encoding algorithmcomprises: representing each of said series of n-characters from analphabet of size M by-an integer between 0 and M−1; establishing ann-integer vector u=(u₀, u₁, . . . , u_(n−1)), wherein each of saidintegers u, corresponds to a character in said alphabet of size M, andeach u₁ is an integer between 0 and M−1; and encoding said n-integervector u=(u₀, u₁, . . . , u_(n−1)) by appending to said u at least oneparity-integer r, wherein r is determined by taking a residue modulo Mof an inner product of vector u with a weight vector of integers moduloM w=(w₀, w₁, . . . , w_(n−1)).
 3. The method in claim 2, whereindifferences w₁−w₁₊₁ of consecutive weight integers w₁ and w₁₊₁ in saidweight vector w=(w₀, w₁, . . . , w_(n−1)) are invertible as integersmodulo M as well as the sum w_(n−1)+1 of the last integer w_(n−1) withthe integer
 1. 4. The method in claim 3, wherein said M is 10, anddigits in said weight vector w=(w₀, w₁, . . . w_(n−1)) are selected sothat said digits . . . w_(n−5)w_(n−3)w_(n−1) belong in the set {2, 4, 6,8} and said digits . . . w_(n−6)w_(n−4)w_(n−2) belong in the set {1, 3,7, 9}.
 5. The method in claim 1, wherein said encoding algorithmcomprises: representing each of said series of n characters in analphabet of M characters by an integer between 0 and M−1; establishingan n-integer vector u(u₀, u₁, . . . , u_(n−1)), wherein each of saidintegers u₁ corresponds to a character in said alphabet of size M, andeach u₁ is an integer between 0 and M−1; and encoding said n-integervector u=(u₀, u₁, . . . , u_(n−1)) by appending to said u a plurality ofparity integers r₀, r₁, . . . , r_(L−1), wherein each said r_(j) isdetermined by taking the residue modulo M of the inner product of vectoru with a weight vector w_(j)=(w_(j,0), w_(j,1), . . . , w_(j,n−1)). 6.The method in claim 5, wherein the vectors w_(j) are chosen so that inan L×(n+L) matrix formed by appending to an L×n matrix whose rows aresaid vectors w_(j) the L×L identity matrix, any L×L matrix obtained bytaking L consecutive columns in said L×(n+L) matrix is invertible in thering of integers modulo M.
 7. The method in claim 1, wherein saidencoding algorithm comprises: choosing a first q such that said q is aprime power and q≧M; adding foraneous characters, if necessary, to saidalphabet of M characters until a new set of q characters is obtained;establishing a primitive element a in the finite field GF(q);representing one of the q characters in said extended set of charactersby 0 and the remaining characters by the q−1 powers a) of a^(j) whereinj runs from 0 to q−2; establishing an n-character vector u=(u₀, u₁, . .. , u_(n−1)), wherein each character u₁ is either 0 or a power of adependent upon said representation; and encoding said n-character vectoru=(u₀, u₁,. . , u_(n−1)) by appending to said u a plurality of paritycharacters r₀, r₁, . . . , r_(L−1), wherein each said r_(j) isdetermined by taking an inner product of vector u with a weight vectorw_(j)=(w_(j,0), w_(j,1), . . . , w_(j,n−1)) wherein said charactersw_(j,i) are powers of said primitive element “a” according to saidrepresentation.
 8. The method in claim 7, wherein consecutive charactersw_(0,1) and w_(0,1+1) in first of said weight vectors w₀=(w_(0,0),w_(0,1), . . . , w_(0,n−1)) are different and a last characterw_(0, n−1), is different from a character corresponding to −1 in GF(q).9. The method in claim 7, wherein said vectors w_(j) are chosen so thatin an L×(n+L) matrix composed by appending to an L×n matrix whose rowsare said vectors w_(j) the L×L identity matrix, any L×L matrix obtainedby taking L consecutive columns in said L×(n+L) matrix is invertible inthe field GF(q).
 10. The method in claim 1, further comprising providinga warning when said comparison of said parity character(s) aredifferent.
 11. The method in claim 10, wherein said warning can bedeactivated.
 12. The method in claim 10, wherein said warning suspendsdata entry.
 13. The method in claim 1, wherein said fixed series ofcharacters comprise numerical digits.
 14. The method in claim 1, whereinsaid fixed series of characters comprise alphabetical letters,alphanumeric signs, and symbols; whereby said characters are enteredthrough said data entry device.
 15. The method in claim 1, wherein saidmethod is used for detecting improper entry of a social security number.16. An electronic apparatus for verifying proper data entry into saidapparatus using a data entry device, said apparatus comprising: a memorythat stores a predetermined series of n-characters from an alphabet ofsize M using a modulo M arithmetic encoding algorithm not requiringcharacters foraneous to said alphabet, whereby each predetermined andencoded series of n-characters adds at least one stored parity characterthereto; a data entry encoder that recomputes secondary paritycharacter(s) using said encoding algorithm when n-characters are enteredthrough said data entry device; a comparator that compares said storedand secondary parity character(s); and a gate device for disabling dataentry if said parity character(s) are different.
 17. The apparatus inclaim 16, wherein said apparatus implements said encoding algorithm andgenerates said at least one parity character(s) by: representing each ofsaid series of n-characters from an alphabet of size M by an integerbetween 0 and M−1; establishing an n-integer vector u=(u₀, u₁, . . . ,u_(n−1)), wherein each of said integers u₁ corresponds to a character insaid alphabet of size M, and each u₁ is an integer between 0 and M−1;and encoding said n-integer vector u=(u₀, u₁, . . . , u_(n−1)) byappending to said u at least one parity-integer r, wherein r isdetermined by taking a residue modulo M of an inner product of vector uwith a weight vector of integers modulo M, w=(w₀, w₁, . . . , w_(n−1)).18. The apparatus in claim 17, wherein differences w₁−w₁₊₁ ofconsecutive weight integers w₁ and w₁₊₁ in said weight vector w=(w₀, w₁,. . . , w_(n−1)) are invertible as integers modulo M as well as the sumw_(n−1)+1 of the last integer w_(n−1) with the integer
 1. 19. Theapparatus in claim 18, wherein said M is 10, and digits in said weightvector w=(w₀, w₁, . . . , w_(n−1)) are selected so that said digits . .. w_(n−5)w_(n−3)w_(n−1) belong in the set {2,4,6, 8} and said digits . .. w_(n−6)w_(n−4)w_(n−2) belong in the set { 1, 3, 7, 9}.
 20. Theapparatus in claim 16, wherein said encoding algorithm where multipleparity characters are generated comprises: representing each of saidseries of n characters in an alphabet of M characters by an integerbetween 0 and M−1; establishing an n-integer vector u=(u₀, u₁, . . . ,u_(n−1)) wherein each of said integers u, corresponds to a character insaid alphabet of size M, and each u₁ is an integer between 0 and M−1;and encoding said n-integer vector u=(u₀, u₁, . . . , u_(n−1)) byappending to said u a plurality of parity integers r₀, r₁, . . . ,r_(L−1), wherein each said r_(j) is determined by taking the residuemodulo M of the inner product of vector u with a weight vectorw_(j)=(w_(j,0), w_(j,1), . . . , w_(j,n−1)).
 21. The apparatus in claim20, wherein said weight vectors w_(j) are selected so that in anL×(n+L)-matrix formed by appending to an L×n-matrix whose rows are saidvectors w_(j) L×L identity matrix, any L×L matrix obtained by taking Lconsecutive columns in said L×(n+L) matrix is invertible in the ring ofintegers modulo M.
 22. The apparatus in claim 16, wherein said encodingalgorithm comprises: choosing a first q such that said q is a primepower and q≧M; adding foraneous characters, if necessary, to saidalphabet of M characters until a new set of q characters is obtained;establishing a primitive element a in the finite field GF(q);representing one of the q characters in said extended set of charactersby 0 and the remaining characters by the q−1 powers a^(j) of a, whereinj runs from 0 to q−2; establishing an n-character vector u=(u₀, u₁, . .. , u_(n−1)), wherein each character u₁ is either 0 or a power of adependent upon said representation; and encoding said n-character vectoru=(u₀, u₁, . . . , u_(n−1)) by appending to said u a plurality of paritycharacters r₀, r₁, . . . , r_(L−1), wherein each said r_(j) isdetermined by taking an inner product of vector u with a weight vectorw_(j)=(w_(j,0), w₁. . . , w_(j,n−1)) wherein said characters w_(j,1) arepowers of said primitive element “a” according to said representation.23. The apparatus in claim 22, wherein consecutive characters w_(0,1)and w_(0,1+1) in first of said weight vector wo=(w_(0,0), w_(0,1), . . ., w_(0,n−1)) are different and a last character w_(0,n−)is differentfrom a character corresponding to −1 in GF(q).
 24. The apparatus inclaim 22, wherein said vectors are chosen so that in said L×(n+L)-matrixcomposed by appending to an L×n matrix whose rows are said vectors w_(j)the L×L identity matrix, any L×L matrix obtained by taking L consecutivecolumns in said L×(n+L) matrix is invertible in the field GF(q).
 25. Theapparatus in claim 16, wherein said gate device is a warning device thatactivates when said parity characters are different.
 26. The apparatusin claim 16, wherein said gate device includes a bypass fordeactivation.
 27. The apparatus in claim 16, wherein said gate deviceincludes an human perceivable output device that simultaneouslyactivates when data entry is suspended.
 28. A program storage devicereadable by a machine, tangibly embodying a program of instructionsexecutable by said machine to perform a method for verifying proper dataentry into said machine using a data entry device, said methodcomprising: encoding and storing a predetermined series of n-charactersfrom an alphabet of size M using a modulo M arithmetic encodingalgorithm not requiring characters foraneous to said alphabet, whereby aresultant encoded series of characters adds at least one stored paritycharacter to said predetermined series of n-characters; entering anentered series of characters using said data entry device; recomputingsecondary parity character(s) from first n-characters of said enteredseries of characters using said encoding algorithm; comparing saidstored parity character(s) with corresponding said secondary paritycharacter(s); and preventing data entry if said parity character(s)comparison of said secondary parity character(s) and said stored paritycharacter(s) are different.
 29. The device in claim 28, wherein saidencoding algorithm comprises: representing each of said series ofn-characters from an alphabet of size M by an integer between 0 and M−1;establishing an n-integer vector u=(u₀, u₁, . . . , u_(n−1)), whereineach of said integers u₁ corresponds to a character in said alphabet ofsize M, and each u₁ is an integer between 0 and M−1; and encoding saidn-integer vector u=(u₀, u₁, . . . , u_(n−1)) by appending to said u atleast one parity-integer r, wherein r is determined by taking a residuemodulo M of an inner product of vector u with a weight vector ofintegers modulo M w=(w₀, w₁, . . . , w_(n−1)).
 30. The device in claim29, wherein differences of consecutive weight integers w₁ and w₁₊₁ insaid weight vector w=(w₀, w₁, . . . , w_(n−1)) are invertible asintegers modulo M as well as the sum w_(n−1)+1 of the last integerw_(n−1) with the integer
 1. 31. The device in claim 30, wherein said Mis 10, and digits in said weight vector w=(w₀, w₁, . . . , w_(n−1)) areselected so that said digits . . . w_(n−5)w_(n−3)w_(n−1) belong in theset {2, 4, 6 , 8} and said digits. w_(n−6)w_(n−4)w_(n−2) belong in theset {1, 3, 7, 9}.
 32. The device in claim 28, wherein said encodingalgorithm for generating multiple parity characters comprises:representing each of said series of n characters in an alphabet of Mcharacters by an integer between 0 and M−1; establishing an n-integervector u=(u₀, u₁, . . . , u_(n−1)), wherein each of said integers u,corresponds to a character in said alphabet of size M, and each u₁ is aninteger between 0 and M−1; and encoding said n-integer vector u=(u₀, u₁,. . . , u_(n−1)) by appending to said u a plurality of parity integersr₀, r₁, . . . , r_(L−1), wherein each said r₁ is determined by takingthe residue modulo M of the inner product of vector u with a weightvector w_(j)=(w_(j,0), w_(j,1). . . , w_(j,n−1)).
 33. The device inclaim 32, wherein said weight vectors w_(j) are selected so that in anL×(n+L) matrix formed by appending to an L×n-matrix whose rows are saidvectors w_(j) the L×L identity matrix, any L×L matrix obtained by takingL consecutive columns in said L×(n+L) matrix is invertible in the ringof integers modulo M.
 34. The device in claim 28, wherein said encodingalgorithm comprises: choosing a first q such that said q is a primepower and q≧M; adding foraneous characters, if necessary, to saidalphabet of M characters until a new set of q characters is obtained;establishing a primitive element a in the finite field GF(q).representing one of the q characters in said extended set of charactersby 0 and the remaining characters by the q−1 powers a^(j) of a, whereinj runs from 0 to q−2; establishing an n-character vector u=(u₀, u₁, . .. , u_(n−1)), wherein each character u₁ is either 0 or a power of adependent upon said representation; and encoding said n-character vectoru=(u₀, u₁, . . . , u_(n−1)) by appending to said u a plurality of paritycharacters r₀, r₁, . . . , r_(L−1), wherein each said r_(j) isdetermined by taking an inner product of vector u with a weight vectorw_(j)=(w_(j,0), w_(j,1), . . . , w_(j,n−1)), wherein said charactersw_(j,1) are powers of said primitive element “a” according to saidrepresentation.
 35. The device in claim 34, wherein consecutivecharacters w_(0,1) and w_(0,1+1) in first of said weight vectorw₀=(w_(0,0), w_(0,1), . . . , w_(0,n−1)) are different and a lastcharacter w_(0,n−1) is different from a character corresponding to −1 inGF(q).
 36. The device in claim 34, wherein said vectors w_(j) are chosenso that in said L×(n+L) matrix composed by appending to an L×n matrixwhose rows are said vectors w_(j) the L×L identity matrix, any L×Lmatrix obtained by taking L consecutive columns in said L×(n+L) matrixis invertible in the field GF(q).
 37. The device in claim 28, furthercomprising providing an output warning when said parity character(s) aredifferent.
 38. The device in claim 37, wherein said warning includes abypass mode for deactivating said warning.
 39. The device in claim 37,wherein said warning includes suspending data entry.
 40. The device inclaim 28, wherein said series of characters comprise numerical digits.41. The device in claim 28, wherein said series of characters comprisealphabetical letters.